548 search results - page 7 / 110 » Core-Selectability in Chip Multiprocessors |
IPPS
2000
IEEE
15 years 1 months ago
2000
IEEE
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
88
Voted
HPCC
2005
Springer
15 years 3 months ago
2005
Springer
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
76
Voted
ASAP
2003
IEEE
15 years 2 months ago
2003
IEEE
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
DAC
2011
ACM
13 years 9 months ago
2011
ACM
We present ChronOS Linux, a best-effort real-time Linux kernel for chip multiprocessors (CMPs). ChronOS addresses the intersection of three problem spaces: a) OS-support for obta...
93
Voted
PPL
2008
14 years 9 months ago
2008
This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronizati...