Chip multiprocessors (CMPs) are becoming a popular way of exploiting ever-increasing number of on-chip transistors. At the same time, the location of data on the chip can play a c...
Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemi...
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures sin...
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for Multi-Processor System-onChip (MPSoC) architectures. In an earlier paper we proposed a energ...
Pascal T. Wolkotte, Gerard J. M. Smit, Jens E. Bec...