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» Core-Selectability in Chip Multiprocessors
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137
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ISCA
2009
IEEE
178views Hardware» more  ISCA 2009»
15 years 10 months ago
Thread motion: fine-grained power management for multi-core systems
Dynamic voltage and frequency scaling (DVFS) is a commonly-used powermanagement scheme that dynamically adjusts power and performance to the time-varying needs of running programs...
Krishna K. Rangan, Gu-Yeon Wei, David Brooks
MICRO
2009
IEEE
134views Hardware» more  MICRO 2009»
15 years 10 months ago
Coordinated control of multiple prefetchers in multi-core systems
Aggressive prefetching is very beneficial for memory latency tolerance of many applications. However, it faces significant challenges in multi-core systems. Prefetchers of diff...
Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, Yale N....
117
Voted
CASES
2009
ACM
15 years 10 months ago
Optimal loop parallelization for maximizing iteration-level parallelism
This paper solves the open problem of extracting the maximal number of iterations from a loop that can be executed in parallel on chip multiprocessors. Our algorithm solves it opt...
Duo Liu, Zili Shao, Meng Wang, Minyi Guo, Jingling...
ASAP
2008
IEEE
142views Hardware» more  ASAP 2008»
15 years 10 months ago
Managing multi-core soft-error reliability through utility-driven cross domain optimization
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
Wangyuan Zhang, Tao Li
142
Voted
DATE
2008
IEEE
130views Hardware» more  DATE 2008»
15 years 10 months ago
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs
—Increasing integrated circuit (IC) power densities and temperatures may hamper multiprocessor system-on-chip (MPSoC) use in hard real-time systems. This article formalizes the t...
Thidapat Chantem, Robert P. Dick, Xiaobo Sharon Hu