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86
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ISCAS
2003
IEEE
90views Hardware» more  ISCAS 2003»
15 years 6 months ago
A reduction technique of large scale RCG interconnects in complex frequency domain
High frequency digital LSIs usually consist of many subcircuits coupled with multi-conductor interconnects embedded in the substrate. They sometimes cause serious problems of the ...
Yoshihiro Yamagami, Yoshifumi Nishio, Atsumi Hatto...
133
Voted
CAIP
2003
Springer
202views Image Analysis» more  CAIP 2003»
15 years 6 months ago
Modeling Adaptive Deformations during Free-Form Pose Estimation
In this article we discuss the 2D-3D pose estimation problem of deformable 3D free-form contours. In our scenario we observe objects of any 3D shape in an image of a calibrated cam...
Bodo Rosenhahn, Christian Perwass, Gerald Sommer
128
Voted
EMSOFT
2003
Springer
15 years 6 months ago
Constraint-Based Design-Space Exploration and Model Synthesis
An important bottleneck in model-based design of embedded systems is the cost of constructing models. This cost can be significantly decreased by increasing the reuse of existing m...
Sandeep Neema, Janos Sztipanovits, Gabor Karsai, K...
DATE
2010
IEEE
204views Hardware» more  DATE 2010»
15 years 5 months ago
Assertion-based verification of RTOS properties
— Today, mobile and embedded real time systems have to cope with the migration and allocation of multiple software tasks running on top of a real time operating system (RTOS) res...
Marcio F. S. Oliveira, Henning Zabel, Wolfgang M&u...
DATE
2002
IEEE
103views Hardware» more  DATE 2002»
15 years 5 months ago
Test Resource Partitioning and Reduced Pin-Count Testing Based on Test Data Compression
We present a new test resource partitioning (TRP) technique for reduced pin-count testing of system-on-a-chip (SOC). The proposed technique is based on test data compression and o...
Anshuman Chandra, Krishnendu Chakrabarty