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» Cortical architectures on a GPGPU
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VISUALIZATION
2005
IEEE
14 years 13 hour ago
General Purpose Computation on Graphics Hardware
The rapid increase in the performance of graphics hardware, coupled with recent improvements in its programmability, have made graphics hardware a compelling platform for computat...
Aaron E. Lefohn, Ian Buck, Patrick S. McCormick, J...
NECO
2008
156views more  NECO 2008»
13 years 6 months ago
Dynamical Constraints on Using Precise Spike Timing to Compute in Recurrent Cortical Networks
ns. We have previously developed an abstract dynamical system for networks of spiking neurons that has allowed us to identify the criterion for the stationary dynamics of a network...
Arunava Banerjee, Peggy Seriès, Alexandre P...
IEEECIT
2010
IEEE
13 years 4 months ago
Efficiently Using a CUDA-enabled GPU as Shared Resource
GPGPU is getting more and more important, but when using CUDA-enabled GPUs the special characteristics of NVIDIAs SIMT architecture have to be considered. Particularly, it is not ...
Hagen Peters, Martin Koper, Norbert Luttenberger
JCNS
2002
99views more  JCNS 2002»
13 years 6 months ago
Coarse-Grained Reduction and Analysis of a Network Model of Cortical Response: I. Drifting Grating Stimuli
We present a reduction of a large-scale network model of visual cortex developed by McLaughlin, Shapley, Shelley, and Wielaard. The reduction is from many integrate-and-fire neuron...
Michael Shelley, David McLaughlin
DAC
2009
ACM
14 years 7 months ago
Event-driven gate-level simulation with GP-GPUs
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
Debapriya Chatterjee, Andrew DeOrio, Valeria Berta...