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ERSA
2006
76views Hardware» more  ERSA 2006»
14 years 11 months ago
Logic Synthesis and Place-and-Route Environment for ORGAs
Abstract-- We have continued development of Optically Reconfigurable Gate Arrays (ORGAs) to realize larger virtual gate count VLSIs than currently available VLSIs. The grain and st...
Minoru Watanabe, Fuminori Kobayashi
ACL
2001
14 years 11 months ago
What is the Minimal Set of Fragments that Achieves Maximal Parse Accuracy?
We aim at finding the minimal set of fragments which achieves maximal parse accuracy in Data Oriented Parsing. Experiments with the Penn Wall Street Journal treebank show that cou...
Rens Bod
NAACL
2010
14 years 7 months ago
Language identification of names with SVMs
The task of identifying the language of text or utterances has a number of applications in natural language processing. Language identification has traditionally been approached w...
Aditya Bhargava, Grzegorz Kondrak
CASES
2004
ACM
15 years 3 months ago
Analytical computation of Ehrhart polynomials: enabling more compiler analyses and optimizations
Many optimization techniques, including several targeted specifically at embedded systems, depend on the ability to calculate the number of elements that satisfy certain conditio...
Sven Verdoolaege, Rachid Seghir, Kristof Beyls, Vi...
ASPLOS
2004
ACM
15 years 3 months ago
Scalable selective re-execution for EDGE architectures
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
Rajagopalan Desikan, Simha Sethumadhavan, Doug Bur...