Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Two methods are described for enhancing performance of branch and bound methods for overconstrained CSPS. These methods improve either the upper or lower bound, respectively, duri...
Model counting is the classical problem of computing the number of solutions of a given propositional formula. It vastly generalizes the NP-complete problem of propositional satis...
We discuss fast exponential time solutions for NP-complete problems. We survey known results and approaches, we provide pointers to the literature, and we discuss several open prob...
This paper describes methods for counting the number of non-negative integer solutions of the system Ax = b when A is a non-negative totally unimodular matrix and b an integral ve...