23 search results - page 3 / 5 » Coupling-Driven Bus Design for Low-Power Application-Specifi... |
DAC
1999
ACM
15 years 10 months ago
1999
ACM
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
PATMOS
2004
Springer
15 years 2 months ago
2004
Springer
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
ISCAS
2002
IEEE
15 years 2 months ago
2002
IEEE
Pre-designed configurable platforms, possessing microprocessors, memories, and numerous peripherals on a single chip, are increasing in popularity in embedded system design. Platf...
FDL
2003
IEEE
15 years 2 months ago
2003
IEEE
With System on Chip low power constraints becoming increasingly important, emphasis is moving to architectural level, optimum memory organisation and system run time management. T...
DATE
2000
IEEE
15 years 2 months ago
2000
IEEE
We present a technique for fast estimation of the power consumed by the cache and bus sub-system of a parameterized system-on-a-chip design for a given application. The technique ...