1477 search results - page 37 / 296 » Criteria for the evaluation of implemented architectures |
SC
2009
ACM
15 years 4 months ago
2009
ACM
The present contribution explores the design space for virtual channel (VC) and switch allocators in network-on-chip (NoC) routers. Based on detailed RTL-level implementations, we...
ICCSA
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. The last advances in commodity hardware have allowed users of immersive visualization to create high-performance systems using a set of interconnected computers. These sy...
FPGA
2001
ACM
15 years 2 months ago
2001
ACM
Matching and searching computations play an important role in the indexing of data. These computations are typically encoded in very tight loops with a single index variable and a...
ICASSP
2011
IEEE
14 years 1 months ago
2011
IEEE
In this paper, we propose and evaluate two parallel implementations of Multi-dimensional Ensemble Empirical Mode Decomposition (MEEMD) for multi-core (CPU) and many-core (GPU) arc...
SBACPAD
2003
IEEE
15 years 3 months ago
2003
IEEE
This paper presents a theoretical study to evaluate the performance of a family of parallel implementations of the propagation algorithm. The propagation algorithm is used to an i...