1477 search results - page 41 / 296 » Criteria for the evaluation of implemented architectures |
DAC
2005
ACM
14 years 11 months ago
2005
ACM
1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
HPDC
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper describes the design and implementation of SWORD, a scalable resource discovery service for widearea distributed systems. In contrast to previous systems, SWORD allows ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
FCCM
2009
IEEE
15 years 4 months ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
DAC
2001
ACM
15 years 10 months ago
2001
ACM
This presentation will give a list of design criteria an ASIC Design house need to look in the process of deciding to take the complex Bluetooth specification and implement everyt...