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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
15 years 4 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
100
Voted
VEE
2006
ACM
126views Virtualization» more  VEE 2006»
15 years 4 months ago
A new approach to real-time checkpointing
The progress towards programming methodologies that simplify the work of the programmer involves automating, whenever possible, activities that are secondary to the main task of d...
Antonio Cunei, Jan Vitek
82
Voted
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 4 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
WIOPT
2005
IEEE
15 years 4 months ago
Secure Comparison of Encrypted Data in Wireless Sensor Networks
End-to-end encryption schemes that support operations over ciphertext are of utmost importance for commercial private party Wireless Sensor Network implementations to become meani...
Mithun Acharya, Joao Girão, Dirk Westhoff
CASES
2004
ACM
15 years 4 months ago
Hardware assisted control flow obfuscation for embedded processors
+ With more applications being deployed on embedded platforms, software protection becomes increasingly important. This problem is crucial on embedded systems like financial transa...
Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, San...