Sciweavers

1019 search results - page 103 / 204
» Cryptographic Design Vulnerabilities
Sort
View
IANDC
2008
105views more  IANDC 2008»
15 years 3 months ago
Symbolic protocol analysis for monoidal equational theories
We are interested in the design of automated procedures for analyzing the (in)security of cryptographic protocols in the Dolev-Yao model for a bounded number of sessions when we t...
Stéphanie Delaune, Pascal Lafourcade, Denis...
CODES
2007
IEEE
15 years 10 months ago
Secure FPGA circuits using controlled placement and routing
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an ex...
Pengyuan Yu, Patrick Schaumont
128
Voted
ETS
2011
IEEE
224views Hardware» more  ETS 2011»
14 years 3 months ago
AVF Analysis Acceleration via Hierarchical Fault Pruning
—The notion of Architectural Vulnerability Factor (AVF) has been extensively used by designers to evaluate various aspects of design robustness. While AVF is a very accurate way ...
Michail Maniatakos, Chandra Tirumurti, Abhijit Jas...
DAC
1999
ACM
16 years 4 months ago
Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: ...
John Lach, William H. Mangione-Smith, Miodrag Potk...
HIPEAC
2010
Springer
16 years 28 days ago
Scalable Shared-Cache Management by Containing Thrashing Workloads
Abstract. Multi-core processors with shared last-level caches are vulnerable to performance inefficiencies and fairness issues when the cache is not carefully managed between the m...
Yuejian Xie, Gabriel H. Loh