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ICICS
2009
Springer
15 years 10 months ago
Design of Reliable and Secure Multipliers by Multilinear Arithmetic Codes
Abstract. We propose an efficient technique for the detection of errors in cryptographic circuits introduced by strong adversaries. Previously a number of linear and nonlinear err...
Zhen Wang, Mark G. Karpovsky, Berk Sunar, Ajay Jos...
IOLTS
2005
IEEE
120views Hardware» more  IOLTS 2005»
15 years 9 months ago
Side-Channel Issues for Designing Secure Hardware Implementations
Selecting a strong cryptographic algorithm makes no sense if the information leaks out of the device through sidechannels. Sensitive information, such as secret keys, can be obtai...
Lejla Batina, Nele Mentens, Ingrid Verbauwhede
AES
2004
Springer
190views Cryptology» more  AES 2004»
15 years 9 months ago
Small Size, Low Power, Side Channel-Immune AES Coprocessor: Design and Synthesis Results
Abstract. When cryptosystems are being used in real life, hardware and software implementations themselves present a fruitful field for attacks. Side channel attacks exploit infor...
Elena Trichina, Tymur Korkishko, Kyung-Hee Lee
132
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DATE
2005
IEEE
109views Hardware» more  DATE 2005»
15 years 9 months ago
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement
Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-qua...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
IJNSEC
2007
137views more  IJNSEC 2007»
15 years 3 months ago
An FPGA-based AES-CCM Crypto Core For IEEE 802.11i Architecture
The widespread adoption of IEEE 802.11 wireless networks has brought its security paradigm under active research. One of the important research areas in this field is the realiza...
Arshad Aziz, Nassar Ikram