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103
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CHES
2005
Springer
85views Cryptology» more  CHES 2005»
15 years 9 months ago
Secure Data Management in Trusted Computing
Abstract. In this paper we identify shortcomings of the TCG specification related to the availability of sealed data during software and hardware life cycles, i.e., software updat...
Ulrich Kühn, Klaus Kursawe, Stefan Lucks, Ahm...
128
Voted
CHES
2005
Springer
146views Cryptology» more  CHES 2005»
15 years 9 months ago
AES on FPGA from the Fastest to the Smallest
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
Tim Good, Mohammed Benaissa
139
Voted
CHES
2005
Springer
123views Cryptology» more  CHES 2005»
15 years 9 months ago
Improved Higher-Order Side-Channel Attacks with FPGA Experiments
We demonstrate that masking a block cipher implementation does not sufficiently improve its security against side-channel attacks. Under exactly the same hypotheses as in a Differ...
Eric Peeters, François-Xavier Standaert, Ni...
124
Voted
CHES
2005
Springer
100views Cryptology» more  CHES 2005»
15 years 9 months ago
Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints
During the last years, several logic styles that counteract side-channel attacks have been proposed. They all have in common that their level of resistance heavily depends on imple...
Thomas Popp, Stefan Mangard
121
Voted
CHES
2005
Springer
129views Cryptology» more  CHES 2005»
15 years 9 months ago
Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment
Wave dynamic differential logic combined with differential routing is a working, practical technique to thwart side-channel power attacks. Measurement-based experimental results sh...
Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng L...