Sciweavers

86 search results - page 4 / 18
» Custom Data Layout for Memory Parallelism
Sort
View
HPCA
2011
IEEE
12 years 10 months ago
Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing
Flash memory based solid state drives (SSDs) have shown a great potential to change storage infrastructure fundamentally through their high performance and low power. Most recent ...
Feng Chen, Rubao Lee, Xiaodong Zhang
FCCM
2007
IEEE
124views VLSI» more  FCCM 2007»
14 years 18 days ago
A Hybrid Memory Sub-system for Video Coding Applications
This paper introduces a parameterisable, application and platform-independent, hybrid memory sub-system for custom hardware. This memory sub-system consists of a scratchpad memory...
Su-Shin Ang, George A. Constantinides, Wayne Luk, ...
CORR
2011
Springer
222views Education» more  CORR 2011»
12 years 9 months ago
A New Data Layout For Set Intersection on GPUs
Abstract—Set intersection is the core in a variety of problems, e.g. frequent itemset mining and sparse boolean matrix multiplication. It is well-known that large speed gains can...
Rasmus Resen Amossen, Rasmus Pagh
ICDCS
1995
IEEE
13 years 9 months ago
Parallel Processing on Networks of Workstations: A Fault-Tolerant, High Performance Approach
One of the mostsoughtaftersoftware innovation of thisdecade is the construction of systems using off-the-shelf workstations that actually deliver, and even surpass, the power and ...
Partha Dasgupta, Zvi M. Kedem, Michael O. Rabin
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 6 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...