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» Custom Hardware Architectures for Posture Analysis
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BMCBI
2008
115views more  BMCBI 2008»
13 years 6 months ago
BioGraphE: high-performance bionetwork analysis using the Biological Graph Environment
Background: Graphs and networks are common analysis representations for biological systems. Many traditional graph algorithms such as k-clique, k-coloring, and subgraph matching h...
George Chin Jr., Daniel G. Chavarría-Mirand...
WH
2010
171views Healthcare» more  WH 2010»
13 years 1 months ago
Evaluation of body sensor network platforms: a design space and benchmarking analysis
Body Sensor Networks (BSNs) consist of sensor nodes deployed on the human body for health monitoring. Each sensor node is implemented by interfacing a physiological sensor with a ...
Sidharth Nabar, Ayan Banerjee, Sandeep K. S. Gupta...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 13 days ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
SAMOS
2004
Springer
13 years 11 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 8 hour ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock