58 search results - page 6 / 12 » Customizable Fault Tolerant Caches for Embedded Processors |
100
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USENIX
1996
15 years 29 days ago
1996
This paper describes a new method for providingtransparent fault tolerance for parallel applications on a network of workstations. We have designed our method in the context of sh...
106
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DSN
2003
IEEE
15 years 5 months ago
2003
IEEE
Our goal is to automatically obtain a distributed and fault-tolerant embedded system: distributed because the system must run on a distributed architecture; fault-tolerant because...
DSD
2007
IEEE
15 years 3 months ago
2007
IEEE
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
ASAP
2007
IEEE
14 years 11 months ago
2007
IEEE
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
113
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HPCA
2007
IEEE
16 years 11 hour ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...