209 search results - page 12 / 42 » Customized Instruction-Sets for Embedded Processors |
CASES
2005
ACM
14 years 11 months ago
2005
ACM
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
CSE
2008
IEEE
14 years 11 months ago
2008
IEEE
A well-known challenge during processor design is to obtain best possible results for a typical target application domain by combining flexibility and computational performance. A...
FDL
2007
IEEE
15 years 4 months ago
2007
IEEE
—This paper presents Anahita Processor Description Language (APDL) for generation of retargetable processor design tool sets. The emphasis is on the applicability of the generate...
VLSID
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper presents an RTL generation scheme for a SimpleScalar / PISA Instruction set architecture with system calls to implement C programs. The scheme utilizes ASIPmeister, a p...
SAC
2005
ACM
15 years 3 months ago
2005
ACM
We present a tool which is designed to be used as a code compression advisory system for object code to be run on an embedded processor. All the compression schemes support run-ti...