Code density is an important issue in memory constrained systems. Some RISC processor, e.g. the THUMB extension in the ARM processor, supports aggressive code size reduction even ...
Youfeng Wu, Mauricio Breternitz Jr., Herbert H. J....
We preseM an algorithm for compiler-driven regisrer mme adjustment with rhe main goal of power minimization on instruction fetch und mgisterjile access. In mosr instruction set ar...
A preliminary model is introduced in this paper whereby data and its associated security properties are treated as a single atomic unit of information in a hardwareonly context. Se...
Brian J. d'Auriol, Tuyen Nguyen, Vo Quoc Hung, Duc...
Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools...
Zdenek Prikryl, Jakub Kroustek, Tomas Hruska, Dusa...
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
Nektarios Kranitis, Antonis M. Paschalis, Dimitris...