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» Customized Instruction-Sets for Embedded Processors
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DATE
2006
IEEE
133views Hardware» more  DATE 2006»
15 years 3 months ago
Automatic generation of operation tables for fast exploration of bypasses in embedded processors
Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses re...
Sanghyun Park, Eugene Earlie, Aviral Shrivastava, ...
HIPC
2000
Springer
15 years 1 months ago
Improving Offset Assignment on Embedded Processors Using Transformations
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
CASES
2005
ACM
14 years 11 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...
DATE
2007
IEEE
126views Hardware» more  DATE 2007»
15 years 4 months ago
A future of customizable processors: are we there yet?
Customizable processors are being used increasingly often in SoC designs. During the past few years, they have proven to be a good way to solve the conflicting flexibility and p...
Laura Pozzi, Pierre G. Paulin
DATE
2010
IEEE
155views Hardware» more  DATE 2010»
15 years 2 months ago
Bitstream processing for embedded systems using C++ metaprogramming
—This paper suggests a new approach for bitstream processing of embedded systems, using a combination of C++ metaprogramming combined with architecture extensions of an customiza...
Reimund Klemm, Gerhard Fettweis