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ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
15 years 6 months ago
An accurate sparse matrix based framework for statistical static timing analysis
Statistical Static Timing Analysis has received wide attention recently and emerged as a viable technique for manufacturability analysis. To be useful, however, it is important th...
Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh,...
DAC
2003
ACM
15 years 10 months ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
ECRTS
2002
IEEE
15 years 2 months ago
Scope-Tree: A Program Representation for Symbolic Worst-Case Execution Time Analysis
Most WCET analysis techniques only provide an upper bound on the worst case execution time as a constant value. However, it often appears that the execution time of a piece of cod...
Antoine Colin, Guillem Bernat
83
Voted
DAC
2008
ACM
15 years 10 months ago
Driver waveform computation for timing analysis with multiple voltage threshold driver models
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
95
Voted
RTSS
2007
IEEE
15 years 4 months ago
Response-Time Analysis for Globally Scheduled Symmetric Multiprocessor Platforms
In the last years, a progressive migration from single processor chips to multi-core computing devices has taken place in the general-purpose and embedded system market. The devel...
Marko Bertogna, Michele Cirinei