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DATE
2003
IEEE
132views Hardware» more  DATE 2003»
15 years 3 months ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
ICNP
2002
IEEE
15 years 2 months ago
An Ultra-fast Shared Path Protection Scheme - Distributed Partial Information Management, Part II
— This paper describes a novel, ultra-fast heuristic algorithm to address an NP-hard optimization problem. One of its significances is that, for the first time, the paper shows...
Dahai Xu, Chunming Qiao, Yizhi Xiong
MFCS
2009
Springer
15 years 2 months ago
An Improved Approximation Bound for Spanning Star Forest and Color Saving
We present a simple algorithm for the maximum spanning star forest problem. We take advantage of the fact that the problem is a special case of complementary set cover and we adapt...
Stavros Athanassopoulos, Ioannis Caragiannis, Chri...
IWVF
2001
Springer
15 years 2 months ago
Judging Whether Multiple Silhouettes Can Come from the Same Object
We consider the problem of recognizing an object from its silhouette. We focus on the case in which the camera translates, and rotates about a known axis parallel to the image, suc...
David W. Jacobs, Peter N. Belhumeur, Ian Jermyn
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
15 years 1 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes