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DATE
2003
IEEE
76views Hardware» more  DATE 2003»
15 years 2 months ago
Library Functions Timing Characterization for Source-Level Analysis
Execution time estimation of software at source-level is nowadays a crucial phase of the system design flow, especially for portable devices and real-time systems. From a source-...
Carlo Brandolese, William Fornaciari, Fabio Salice...
DATE
2003
IEEE
120views Hardware» more  DATE 2003»
15 years 2 months ago
SystemC-VHDL Co-Simulation and Synthesis in the HW Domain
Embedded systems design requires the development of complex HW modules to cope with the most stringent timing constraints of the specifications. This implies the need to update an...
Massimo Bombana, Francesco Bruschi
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
15 years 4 months ago
Incorporating graceful degradation into embedded system design
In this work, the focus is put on the behavior of a system in case a fault occurs that disables the system from executing its applications. Instead of executing a random subset of...
Michael Glaß, Martin Lukasiewycz, Christian ...
BMCBI
2007
159views more  BMCBI 2007»
14 years 9 months ago
sIR: siRNA Information Resource, a web-based tool for siRNA sequence design and analysis and an open access siRNA database
Background: RNA interference has revolutionized our ability to study the effects of altering the expression of single genes in mammalian (and other) cells through targeted knockdo...
Jyoti K. Shah, Harold R. Garner, Michael A. White,...
DATE
2008
IEEE
168views Hardware» more  DATE 2008»
15 years 3 months ago
A methodology for improving software design lifecycle in embedded control systems
Control design and real-time implementation are usually performed in isolation. The effects of the computer implementation on control system performance are still evaluated on the...
Mohamed El Mongi Ben Gaid, Rémy Kocik, Yves...