56 search results - page 5 / 12 » DIRAC: A Scalable Lightweight Architecture for High Throughp... |
SPIESR
1996
14 years 10 months ago
1996
Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In orde...
JSA
2010
14 years 4 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
ANCS
2007
ACM
15 years 1 months ago
2007
ACM
Network operators need high-capacity router architectures that can offer scalability, provide throughput and performance guarantees, and maintain packet ordering. However, previou...
CCGRID
2001
IEEE
15 years 1 months ago
2001
IEEE
Global Computing achieves high throughput computing by harvesting a very large number of unused computing resources connected to the Internet. This parallel computing model target...
FPL
2008
Springer
14 years 11 months ago
2008
Springer
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...