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107
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DAC
2000
ACM
15 years 9 months ago
Removing user specified false paths from timing graphs
David Blaauw, Rajendran Panda, Abhijit Das
134
Voted
DAC
1999
ACM
15 years 9 months ago
An Approach for Extracting RT Timing Information to Annotate Algorithmic VHDL Specifications
Cordula Hansen, Francisco Nascimento, Wolfgang Ros...