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» DNS performance and the effectiveness of caching
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127
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PDP
2010
IEEE
15 years 7 months ago
Lessons Learnt Porting Parallelisation Techniques for Irregular Codes to NUMA Systems
—This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a seve...
Juan Angel Lorenzo, Juan Carlos Pichel, David LaFr...
132
Voted
CASES
2007
ACM
15 years 4 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
110
Voted
INFOCOM
2010
IEEE
14 years 11 months ago
Distributed Caching Algorithms for Content Distribution Networks
—The delivery of video content is expected to gain huge momentum, fueled by the popularity of user-generated clips, growth of VoD libraries, and wide-spread deployment of IPTV se...
Sem C. Borst, Varun Gupta, Anwar Walid
ICDCS
2008
IEEE
15 years 7 months ago
On Cooperative Caching in Wireless P2P Networks
Some recent studies have shown that cooperative cache can improve the system performance in wireless P2P networks such as ad hoc networks and mesh networks. However, all these stu...
Jing Zhao, Ping Zhang, Guohong Cao
114
Voted
ICCAD
2009
IEEE
109views Hardware» more  ICCAD 2009»
14 years 10 months ago
Energy reduction for STT-RAM using early write termination
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
Ping Zhou, Bo Zhao, Jun Yang 0002, Youtao Zhang