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IEEEPACT
2006
IEEE
15 years 10 months ago
Prematerialization: reducing register pressure for free
Modern compiler transformations that eliminate redundant computations or reorder instructions, such as partial redundancy elimination and instruction scheduling, are very effectiv...
Ivan D. Baev, Richard E. Hank, David H. Gross
ISSS
1995
IEEE
104views Hardware» more  ISSS 1995»
15 years 7 months ago
A path-based technique for estimating hardware runtime in HW/SW-cosynthesis
One of the key issues in hardware/software{cosynthesis is precise estimation. The usual local estimation techniques are inadequate for globally optimising compilers and synthesis ...
Jörg Henkel, Rolf Ernst
VLSISP
2002
112views more  VLSISP 2002»
15 years 3 months ago
Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks
Large-grain synchronous dataflow graphs or multi-rate graphs have the distinct feature that the nodes of the dataflow graph fire at different rates. Such multi-rate large-grain dat...
Ramaswamy Govindarajan, Guang R. Gao, Palash Desai
PPAM
2005
Springer
15 years 9 months ago
Asymmetric Scheduling and Load Balancing for Real-Time on Linux SMP
The ARTiS system, a real-time extension of the GNU/Linux scheduler dedicated to SMP (Symmetric Multi-Processors) systems is proposed. ARTiS exploits the SMP architecture to guarant...
Éric Piel, Philippe Marquet, Julien Soula, ...
GRID
2004
Springer
15 years 9 months ago
Hybrid Preemptive Scheduling of MPI Applications on the Grids
— Time sharing between all the users of a Grid is a major issue in cluster and Grid integration. Classical Grid architecture involves a higher level scheduler which submits non o...
Aurelien Bouteiller, Hinde-Lilia Bouziane, Thomas ...