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» DPS - Dynamic Parallel Schedules
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IPPS
2002
IEEE
15 years 9 months ago
Hierarchical Interconnects for On-Chip Clustering
In the sub-micron technology era, wire delays are becoming much more important than gate delays, making it particularly attractive to go for clustered designs. A common form of cl...
Aneesh Aggarwal, Manoj Franklin
IPPS
2000
IEEE
15 years 8 months ago
Register Assignment for Software Pipelining with Partitioned Register Banks
Many techniques for increasing the amount of instruction-level parallelism (ILP) put increased pressure on the registers inside a CPU. These techniques allow for more operations t...
Jason Hiser, Steve Carr, Philip H. Sweany, Steven ...
SPAA
1998
ACM
15 years 8 months ago
Elimination Forest Guided 2D Sparse LU Factorization
Sparse LU factorization with partial pivoting is important for many scienti c applications and delivering high performance for this problem is di cult on distributed memory machin...
Kai Shen, Xiangmin Jiao, Tao Yang
IPPS
2010
IEEE
15 years 2 months ago
Performance evaluation of concurrent collections on high-performance multicore computing systems
This paper is the first extensive performance study of a recently proposed parallel programming model, called Concurrent Collections (CnC). In CnC, the programmer expresses her co...
Aparna Chandramowlishwaran, Kathleen Knobe, Richar...
HIPC
2009
Springer
15 years 1 months ago
Optimizing the use of GPU memory in applications with large data sets
Abstract--With General Purpose programmable GPUs becoming more and more popular, automated tools are needed to bridge the gap between achievable performance from highly parallel ar...
Nadathur Satish, Narayanan Sundaram, Kurt Keutzer