1536 search results - page 250 / 308 » DPS - Dynamic Parallel Schedules |
GPC
2009
Springer
15 years 3 months ago
2009
Springer
A typical grid application requires several processors for execution that may not be fulfilled by single cluster at times. Co-allocation is the concept of aggregating computing res...
ASAP
1997
IEEE
15 years 3 months ago
1997
IEEE
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
MICRO
1997
IEEE
15 years 3 months ago
1997
IEEE
Predicated execution is a promising architectural feature for exploiting instruction-level parallelism in the presence of control flow. Compiling for predicated execution involve...
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MICRO
1993
IEEE
15 years 3 months ago
1993
IEEE
Compile-time code transformations which expose instruction-level parallelism (ILP) typically take into account the constraints imposed by all execution scenarios in the program. H...
ASPLOS
1992
ACM
15 years 3 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...