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» DPS - Dynamic Parallel Schedules
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POPL
2010
ACM
15 years 8 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
HICSS
2009
IEEE
106views Biometrics» more  HICSS 2009»
15 years 6 months ago
A Radical Approach to Network-on-Chip Operating Systems
Operating systems were created to provide multiple tasks with access to scarce hardware resources like CPU, memory, or storage. Modern programmable hardware, however, may contain ...
Michael Engel, Olaf Spinczyk
CCGRID
2009
IEEE
15 years 6 months ago
C-Meter: A Framework for Performance Analysis of Computing Clouds
—Cloud computing has emerged as a new technology that provides large amount of computing and data storage capacity to its users with a promise of increased scalability, high avai...
Nezih Yigitbasi, Alexandru Iosup, Dick H. J. Epema...
FCCM
2009
IEEE
171views VLSI» more  FCCM 2009»
15 years 6 months ago
Accelerating SPICE Model-Evaluation using FPGAs
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
Nachiket Kapre, André DeHon
ISORC
2009
IEEE
15 years 5 months ago
Extended RT-Component Framework for RT-Middleware
Modular component-based robot systems require not only an infrastructure for component management, but also scalability as well as real-time properties. Robot Technology (RT)-Midd...
Hiroyuki Chishiro, Yuji Fujita, Akira Takeda, Yuta...