39 search results - page 2 / 8 » DSP Code Generation with Optimized Data Word-Length Selectio... |
ICCD
2001
IEEE
14 years 3 months ago
2001
IEEE
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
DAC
1995
ACM
13 years 10 months ago
1995
ACM
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
HIPEAC
2007
Springer
14 years 16 days ago
2007
Springer
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
DAC
1997
ACM
13 years 10 months ago
1997
ACM
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...