782 search results - page 107 / 157 » Dag-Consistent Distributed Shared Memory |
ISCA
2009
IEEE
15 years 4 months ago
2009
IEEE
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
ISCA
2000
IEEE
15 years 2 months ago
2000
IEEE
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
LCPC
2007
Springer
15 years 3 months ago
2007
Springer
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
PVM
2004
Springer
15 years 3 months ago
2004
Springer
In SMP clusters it is not always convenient to switch from pure message-passing code to hybrid software designs that exploit shared memory. This paper tackles the problem of restru...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
Abstract—Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz’ Time-Triggered Architectures (TTA) have been proposed as...