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ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 2 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
CORR
2009
Springer
74views Education» more  CORR 2009»
14 years 7 months ago
Parallelizing Deadlock Resolution in Symbolic Synthesis of Distributed Programs
Previous work has shown that there are two major complexity barriers in the synthesis of fault-tolerant distributed programs, namely generation of fault-span, the set of states re...
Fuad Abujarad, Borzoo Bonakdarpour, Sandeep S. Kul...
PERCOM
2011
ACM
14 years 1 months ago
Distributed context-aware visualization
—We present a visualization framework integrated in a context-aware system that uses a common underlying stream processing middleware for tight integration of data accessing, pro...
Harald Sanftmann, Nazario Cipriani, Daniel Weiskop...
PRDC
2007
IEEE
15 years 4 months ago
PAI: A Lightweight Mechanism for Single-Node Memory Recovery in DSM Servers
Several recent studies identify the memory system as the most frequent source of hardware failures in commercial servers. Techniques to protect the memory system from failures mus...
Jangwoo Kim, Jared C. Smolens, Babak Falsafi, Jame...
ICPADS
2006
IEEE
15 years 3 months ago
Memory and Network Bandwidth Aware Scheduling of Multiprogrammed Workloads on Clusters of SMPs
Symmetric Multiprocessors (SMPs), combined with modern interconnection technologies are commonly used to build cost-effective compute clusters. However, contention among processor...
Evangelos Koukis, Nectarios Koziris