782 search results - page 93 / 157 » Dag-Consistent Distributed Shared Memory |
ASPDAC
1995
ACM
15 years 1 months ago
1995
ACM
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...
ICPADS
2000
IEEE
15 years 2 months ago
2000
IEEE
Many nonblocking algorithms have been proposed for shared queues. Previous studies indicate that link-based algorithms perform best. However, these algorithms have a memory manage...
SIGGRAPH
2000
ACM
15 years 2 months ago
2000
ACM
Pomegranate is a parallel hardware architecture for polygon rendering that provides scalable input bandwidth, triangle rate, pixel rate, texture memory and display bandwidth while...
PDP
2010
IEEE
15 years 2 months ago
2010
IEEE
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...