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» Data Criticality in Network-On-Chip Design
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87
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ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
15 years 9 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
87
Voted
JSW
2007
116views more  JSW 2007»
15 years 11 days ago
Security Patterns for Voice over IP Networks
—Voice over IP (VoIP) has had a strong effect on global communications by allowing human voice and fax information to travel over existing packet data networks along with traditi...
Eduardo B. Fernández, Juan C. Pelaez, Mar&i...
CF
2005
ACM
15 years 2 months ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
BMCBI
2006
108views more  BMCBI 2006»
15 years 17 days ago
A new pooling strategy for high-throughput screening: the Shifted Transversal Design
Background: In binary high-throughput screening projects where the goal is the identification of low-frequency events, beyond the obvious issue of efficiency, false positives and ...
Nicolas Thierry-Mieg
PDC
2004
ACM
15 years 6 months ago
From small scale to large scale user participation: a case study of participatory design in e-government systems
Most experiments with participative design are with small scale, stand alone and not very strategic applications of ICT in organizations. However, modern ICT applications are incr...
Anne-Marie Oostveen, Peter Van den Besselaar