Sciweavers

635 search results - page 79 / 127
» Data Criticality in Network-On-Chip Design
Sort
View
TCAD
2008
118views more  TCAD 2008»
15 years 13 days ago
CHIPS: Custom Hardware Instruction Processor Synthesis
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
Kubilay Atasu, Can C. Özturan, Günhan D&...
JPDC
2008
217views more  JPDC 2008»
15 years 15 days ago
Parallel techniques for information extraction from hyperspectral imagery using heterogeneous networks of workstations
Recent advances in space and computer technologies are revolutionizing the way remotely sensed data is collected, managed and interpreted. In particular, NASA is continuously gath...
Antonio J. Plaza
BMCBI
2005
124views more  BMCBI 2005»
15 years 13 days ago
Evaluating concentration estimation errors in ELISA microarray experiments
Background: Enzyme-linked immunosorbent assay (ELISA) is a standard immunoassay to estimate a protein's concentration in a sample. Deploying ELISA in a microarray format perm...
Don Simone Daly, Amanda M. White, Susan M. Varnum,...
112
Voted
MOBISYS
2007
ACM
16 years 4 days ago
A time-and-value centric provenance model and architecture for medical event streams
Provenance becomes a critical requirement for healthcare IT infrastructures, especially when pervasive biomedical sensors act as a source of raw medical streams for large-scale, a...
Min Wang, Marion Blount, John Davis, Archan Misra,...
WMPI
2004
ACM
15 years 6 months ago
A compressed memory hierarchy using an indirect index cache
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
Erik G. Hallnor, Steven K. Reinhardt