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» Data Criticality in Network-On-Chip Design
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107
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MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
15 years 5 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
ECBS
2009
IEEE
114views Hardware» more  ECBS 2009»
15 years 4 months ago
Model-Based Product-Oriented Certification
Future space missions such as the Mars Science Laboratory and Project Constellation suggest the engineering of some of the most complex man-rated software systems. The present pro...
Damian Dechev, Bjarne Stroustrup
118
Voted
TC
1998
15 years 5 days ago
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
Fran Hanchek, Shantanu Dutt
108
Voted
TPDS
1998
129views more  TPDS 1998»
15 years 5 days ago
The Offset Cube: A Three-Dimensional Multicomputer Network Topology Using Through-Wafer Optics
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...
W. Stephen Lacy, José Cruz-Rivera, D. Scott...
JCS
2010
104views more  JCS 2010»
14 years 11 months ago
Finding the PKI needles in the Internet haystack
Public-key cryptography can uniquely enable trust within distributed settings. Employing it usually requires deploying a set of tools and services collectively known as a public k...
Massimiliano Pala, Sean W. Smith