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IPPS
2009
IEEE
15 years 9 months ago
Scalable RDMA performance in PGAS languages
Partitioned Global Address Space (PGAS) languages provide a unique programming model that can span shared-memory multiprocessor (SMP) architectures, distributed memory machines, o...
Montse Farreras, George Almási, Calin Casca...
106
Voted
IEEEPACT
2007
IEEE
15 years 9 months ago
Error Detection Using Dynamic Dataflow Verification
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
Albert Meixner, Daniel J. Sorin
130
Voted
HPCA
1999
IEEE
15 years 7 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
212
Voted
ASPLOS
2009
ACM
16 years 3 months ago
DMP: deterministic shared memory multiprocessing
Current shared memory multicore and multiprocessor systems are nondeterministic. Each time these systems execute a multithreaded application, even if supplied with the same input,...
Joseph Devietti, Brandon Lucia, Luis Ceze, Mark Os...
132
Voted
IEEEPACT
2003
IEEE
15 years 8 months ago
Miss Rate Prediction across All Program Inputs
Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight into how cache behav...
Yutao Zhong, Steve Dropsho, Chen Ding