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ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 8 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
ERSA
2007
177views Hardware» more  ERSA 2007»
15 years 4 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
PADS
2006
ACM
15 years 9 months ago
Aurora: An Approach to High Throughput Parallel Simulation
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
Alfred Park, Richard M. Fujimoto
CLUSTER
2006
IEEE
15 years 9 months ago
A Parallel Algorithm for the Solution of the Deconvolution Problem on Heterogeneous Networks
In this work we present a parallel algorithm for the solution of a least squares problem with structured matrices. This problem arises in many applications mainly related to digit...
Pedro Alonso, Antonio M. Vidal, Alexey L. Lastovet...
HPDC
1993
IEEE
15 years 7 months ago
A Parallel Object-Oriented Framework for Stencil Algorithms
Wepresent an object-oriented framework for constructing parallel implementations of stencil algorithms. This framework simplifres the development process by encapsulating the comm...
John F. Karpovich, Matthew Judd, W. Timothy Straye...