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ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
15 years 9 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...
151
Voted
PPOPP
2012
ACM
13 years 11 months ago
A speculation-friendly binary search tree
We introduce the first binary search tree algorithm designed for speculative executions. Prior to this work, tree structures were mainly designed for their pessimistic (non-specu...
Tyler Crain, Vincent Gramoli, Michel Raynal
137
Voted
ESOP
2009
Springer
15 years 10 months ago
A Basis for Verifying Multi-threaded Programs
Abstract. Advanced multi-threaded programs apply concurrency concepts in sophisticated ways. For instance, they use fine-grained locking to increase parallelism and change locking...
K. Rustan M. Leino, Peter Müller
CONCUR
2007
Springer
15 years 10 months ago
Precise Fixpoint-Based Analysis of Programs with Thread-Creation and Procedures
We present a fixpoint-based algorithm for context-sensitive interprocedural kill/gen-analysis of programs with thread creation. Our algorithm is precise up to abstraction of sync...
Peter Lammich, Markus Müller-Olm
149
Voted
LOPSTR
2004
Springer
15 years 9 months ago
Determinacy Analysis for Logic Programs Using Mode and Type Information
We propose an analysis for detecting procedures and goals that are deterministic (i.e. that produce at most one solution), or predicates whose clause tests are mutually exclusive (...
Pedro López-García, Francisco Bueno,...