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ASAP
2000
IEEE
90views Hardware» more  ASAP 2000»
15 years 9 months ago
Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
Ruby B. Lee
EUROPAR
2010
Springer
15 years 5 months ago
Thread Owned Block Cache: Managing Latency in Many-Core Architecture
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
Fenglong Song, Zhiyong Liu, Dongrui Fan, Hao Zhang...
FCCM
2000
IEEE
144views VLSI» more  FCCM 2000»
15 years 9 months ago
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
Pedro C. Diniz, Joonseok Park
ICDM
2007
IEEE
136views Data Mining» more  ICDM 2007»
15 years 8 months ago
Data Discretization Unification
Data discretization is defined as a process of converting continuous data attribute values into a finite set of intervals with minimal loss of information. In this paper, we prove...
Ruoming Jin, Yuri Breitbart, Chibuike Muoh
CC
2008
Springer
123views System Software» more  CC 2008»
15 years 6 months ago
Automatic Transformation of Bit-Level C Code to Support Multiple Equivalent Data Layouts
Portable low-level C programs must often support multiple equivalent in-memory layouts of data, due to the byte or bit order of the compiler, architecture, or external data formats...
Marius Nita, Dan Grossman