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FPL
2001
Springer
101views Hardware» more  FPL 2001»
15 years 8 months ago
An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars
This paper presents an FPGA-based implementation of a syntactic parser that can process languages generated by almost unrestricted real-life context-free grammars (CFGs). More prec...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...
115
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ICPP
1998
IEEE
15 years 8 months ago
High-Level Information - An Approach for Integrating Front-End and Back-End Compilers
We propose a new universal High-Level Information (HLI) format to effectively integrate front-end and back-end compilers by passing front-end information to the back-end compiler....
Sangyeun Cho, Jenn-Yuan Tsai, Yonghong Song, Bixia...
ISVLSI
2002
IEEE
104views VLSI» more  ISVLSI 2002»
15 years 9 months ago
Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation
Modular inverse computation is needed in several public key cryptographic applications. In this work, we present two VLSI hardware implementations used in the calculation of Montg...
Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, &Ccedi...
IPPS
2003
IEEE
15 years 9 months ago
Phylogenetic Tree Inference on PC Architectures with AxML/PAxML
Inference of phylogenetic trees comprising hundreds or even thousands of organisms based on the maximum likelihood method is computationally extremely expensive. In previous work,...
Alexandros Stamatakis, Thomas Ludwig 0002
CCGRID
2010
IEEE
15 years 5 months ago
Region-Based Prefetch Techniques for Software Distributed Shared Memory Systems
Although shared memory programming models show good programmability compared to message passing programming models, their implementation by page-based software distributed shared m...
Jie Cai, Peter E. Strazdins, Alistair P. Rendell