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128
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HPCA
2009
IEEE
15 years 9 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes
ICS
2007
Tsinghua U.
15 years 8 months ago
Cooperative cache partitioning for chip multiprocessors
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
Jichuan Chang, Gurindar S. Sohi
IEEEPACT
2005
IEEE
15 years 8 months ago
A Distributed Control Path Architecture for VLIW Processors
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael...
WOTUG
2007
15 years 3 months ago
A Process Oriented Approach to USB Driver Development
Abstract. Operating-systems are the core software component of many modern computer systems, ranging from small specialised embedded systems through to large distributed operating-...
Carl G. Ritson, Fred R. M. Barnes
134
Voted
ISCA
2010
IEEE
284views Hardware» more  ISCA 2010»
15 years 7 months ago
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address
Phase change memory (PCM) is an emerging memory technology for future computing systems. Compared to other non-volatile memory alternatives, PCM is more matured to production, and...
Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee