36 search results - page 4 / 8 » Data Reuse Analysis Technique for Software-Controlled Memory... |
IEEEPACT
2008
IEEE
15 years 3 months ago
2008
IEEE
The memory access limits the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip storage, the number of memory acc...
ASPLOS
1991
ACM
15 years 1 months ago
1991
ACM
Blocking is a well-known optimization technique for improving the effectiveness of memory hierarchies. Instead of operating on entire rows or columns of an array, blocked algorith...
ICPPW
2002
IEEE
15 years 2 months ago
2002
IEEE
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transf...
71
Voted
MICRO
1997
IEEE
15 years 1 months ago
1997
IEEE
We revisit memory hierarchy design viewing memory as an inter-operation communication agent. This perspective leads to the development of novel methods of performing inter-operati...
92
Voted
LCTRTS
1998
Springer
15 years 1 months ago
1998
Springer
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...