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FPL
2009
Springer
135views Hardware» more  FPL 2009»
15 years 5 months ago
Fast critical sections via thread scheduling for FPGA-based multithreaded processors
As FPGA-based systems including soft processors become increasingly common, we are motivated to better understand the architectural trade-offs and improve the efficiency of these...
Martin Labrecque, J. Gregory Steffan
IPPS
2009
IEEE
15 years 8 months ago
Enabling high-performance memory migration for multithreaded applications on LINUX
As the number of cores per machine increases, memory architectures are being redesigned to avoid bus contention and sustain higher throughput needs. The emergence of Non-Uniform M...
Brice Goglin, Nathalie Furmento
IPPS
2009
IEEE
15 years 8 months ago
Implementing and evaluating multithreaded triad census algorithms on the Cray XMT
Commonly represented as directed graphs, social networks depict relationships and behaviors among social entities such as people, groups, and organizations. Social network analysi...
George Chin Jr., Andrès Márquez, Sut...
ICPP
2009
IEEE
15 years 8 months ago
Mapping the FDTD Application to Many-Core Chip Architectures
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
Daniel Orozco, Guang R. Gao
ASPDAC
2009
ACM
141views Hardware» more  ASPDAC 2009»
15 years 5 months ago
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri...