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134
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IPPS
2006
IEEE
15 years 10 months ago
Dual-layered file cache on cc-NUMA system
CC-NUMA is a widely adopted and deployed architecture of high performance computers. These machines are attractive for their transparent access to local and remote memory. However...
Zhou Yingchao, Meng Dan, Ma Jie
153
Voted
IPPS
2006
IEEE
15 years 10 months ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 10 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
ISPASS
2006
IEEE
15 years 10 months ago
Friendly fire: understanding the effects of multiprocessor prefetches
Modern processors attempt to overcome increasing memory latencies by anticipating future references and prefetching those blocks from memory. The behavior and possible negative si...
Natalie D. Enright Jerger, Eric L. Hill, Mikko H. ...
SKG
2006
IEEE
15 years 10 months ago
Distributed Grid Resource Discovery with Matchmakers
The Grid provides mechanisms to share dynamic, heterogeneous, distributed resources spanned across multiple administrative domains. Resources required to execute a job are identif...
Mohammad Imran Shaik, S. Mary Saira Bhanu, N. P. G...
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