In this paper we present a novel approach to model the search space for optimal set data types in network component realisations. The main objective is to arrive at power efficie...
Aggressive hardware prefetching often significantly increases energy consumption in the memory system. Experiments show that a major fraction of prefetching related energy degrad...
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
Modern processors can issue and execute multiple instructions per cycle, often performing multiple memory operations simultaneously. To reduce stalls due to resource conflicts, m...
Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, M...
Designers have invested much effort in developing accurate branch predictors with short learning periods. Such techniques rely on exploiting complex and relatively large structure...