Sciweavers

2498 search results - page 463 / 500
» Data Structures with Unpredictable Timing
Sort
View
IWMM
2011
Springer
206views Hardware» more  IWMM 2011»
14 years 18 days ago
A comprehensive evaluation of object scanning techniques
At the heart of all garbage collectors lies the process of identifying and processing reference fields within an object. Despite its key role, and evidence of many different impl...
Robin Garner, Stephen M. Blackburn, Daniel Frampto...
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
15 years 2 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...
SPAA
2004
ACM
15 years 3 months ago
Cache-oblivious shortest paths in graphs using buffer heap
We present the Buffer Heap (BH), a cache-oblivious priority queue that supports Delete-Min, Delete, and Decrease-Key operations in O( 1 B log2 N B ) amortized block transfers fro...
Rezaul Alam Chowdhury, Vijaya Ramachandran
HPCA
2004
IEEE
15 years 10 months ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
CADE
2007
Springer
15 years 10 months ago
Towards Efficient Satisfiability Checking for Boolean Algebra with Presburger Arithmetic
Boolean Algebra with Presburger Arithmetic (BAPA) is a decidable logic that combines 1) Boolean algebra of sets of uninterpreted elements (BA) and 2) Presburger arithmetic (PA). BA...
Viktor Kuncak, Martin C. Rinard