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INFOVIS
1999
IEEE
15 years 2 months ago
Visualizing Application Behavior on Superscalar Processors
The advent of superscalar processors with out-of-order execution makes it increasingly difficult to determine how well an application is utilizing the processor and how to adapt t...
Chris Stolte, Robert Bosch, Pat Hanrahan, Mendel R...
ISCA
1998
IEEE
144views Hardware» more  ISCA 1998»
15 years 2 months ago
Declustered Disk Array Architectures with Optimal and Near-Optimal Parallelism
This paper investigates the placement of data and parity on redundant disk arrays. Declustered organizations have been traditionally used to achieve fast reconstruction of a faile...
Guillermo A. Alvarez, Walter A. Burkhard, Larry J....
ACMSE
2009
ACM
15 years 2 months ago
Towards policy driven self-configuration of user-centric communication
The convergence of various multimedia communications that includes voice, video and data presents many opportunities for enabling unified communication but paradoxically leads to ...
Paola Boettner, Mansi Gupta, Yali Wu, Andrew A. Al...
FCCM
2004
IEEE
107views VLSI» more  FCCM 2004»
15 years 1 months ago
An Alternate Wire Database for Xilinx FPGAs
This paper presents ADB, an Alternate Wire Database, suitable for routing, tracing, and browsing in Xilinx Virtex, Virtex-E, Virtex-II, and Virtex-II Pro FPGAs. While mainstream d...
Neil Steiner, Peter M. Athanas
FPL
2006
Springer
96views Hardware» more  FPL 2006»
15 years 1 months ago
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...
Allan Carroll, Carl Ebeling