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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
15 years 2 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
DSOM
1999
Springer
15 years 2 months ago
Derivation of Backup Service Management Applications from Service and System Models
The backup of large data sets is preferably performed automatically outside of regular working hours. In highly structured computer networks, however, faults and exceptions may rel...
Ingo Lück, Marcus Schönbach, Arnulf Mest...
PRDC
1999
IEEE
15 years 2 months ago
FBD: A Fault-tolerant Buffering Disk System for Improving Write Performance of RAID5 Systems
The parity calculation technique of the RAID5 provides high reliability, efficient disk space usage, and good read performance for parallel-disk-array configurations. However, it ...
Haruo Yokota, Masanori Goto
RSP
1999
IEEE
160views Control Systems» more  RSP 1999»
15 years 2 months ago
Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
Oliver Bringmann, Wolfgang Rosenstiel, Annette Mut...
HPDC
1998
IEEE
15 years 2 months ago
Personal Tele-Immersion Devices
The Electronic Visualization Laboratory (EVL) at the University of Illinois at Chicago (UIC) has partnered with dozens of computational scientists and engineers to create visualiz...
Thomas A. DeFanti, Daniel J. Sandin, Gregory Dawe,...